Transistors to Logic Gate Abstractions and The Gate Source Capacitance

In this video we explore the various logic gate abstractions which can accurately model the outcome of our circuit based on the topology of transistors. We calculate the low and high noise margins, as well as the forbidden region, dependent upon the given static discipline. Lastly, we calculate the falling and rising time constant in response to the gate to source capacitance inherit to MOSFET transistors, this property gives rise to delays or lag in electronics and is vital to incorporating speed into your builds.